FEATURES

• 10 or 12-bit resolution ADC
• 40MSPS conversion rate
• Programmable Gain Amplifier (PGA)
• Adjustable internal voltage references
• Built in clamp function (dc restore) with 10-bit DAC
• Wide Input Bandwidth - 900MHz
• Unsigned Binary or Two’s complement output format
• Programmable via 3-wire serial MPU interface
• Single 3V supply operation
• Low power - 100mW typical at 3.0V supplies
• Powerdown mode to <0.1mW typical
• 28 lead QFN package

The WM8200 is a CMOS high speed, low power, pipeline analogue-to-digital converter (ADC) with 10 or 12-bit output options. It also has an on-chip programmable gain amplifier (PGA), dc clamp circuit and internal voltage references. Conversion is controlled by a single clock input.

The device has a high bandwidth differential sample and hold input, which gives excellent common-mode noise immunity and low distortion. Alternatively, it can be driven in single ended fashion with an optional voltage clamp for dc restoration that can take its reference from an on-chip 10-bit DAC.

The WM8200 provides internal reference voltages for setting the ADC full-scale range without the requirement for external circuitry. However, it can also accept external references for applications where shared or high-precision references are required.

A 3-wire serial interface is used to control the device and a 10 or 12-bit parallel interface is to read ADC conversion data. ADC data can be output in unsigned binary or two’s complement format.

The WM8200 operates with a single 3V supply and is supplied in a 28-lead QFN package.